Welcome

Welcome to the documentation of the MeluXina supercomputer!
Here you will find essential information to get you started, answers to common questions and details regarding an advanced usage of the platform. These pages are constantly evolving, and we welcome your feedback to improve them further. Please ensure you read them thoroughly as our policies are described within.

The MeluXina supercomputer

What's New

Updates and changes on MeluXina are listed in the what's new section. The latest important changes are directly linked below:

• 2025-03-11 - Security and bug fix updates for Rocky 8.10 and RHEL 8.10 on compute and login nodes, along with a kernel update. fuse3 package installed on compute nodes. Additionally, the DDN SFA operating system has been upgraded from version 12.4.0 to 12.6.0.1 as part of preventative maintenance.
• 2024-12-15 - The 2024.1 software stack has been released. Checkt it out! This stack will become the default one on February 15th 2025.
• 2024-09-05 - Major system update for security, stability and performance. Upgrades to the DDN Lustre storage systems (ExaScaler 6.3), (Slurm 23.11). The overall login and compute node environment has been upgraded to RHEL/Rocky Linux 8.10 including new drivers for MeluXina's Nvidia GPUs (now with CUDA 12.6 support), BittWare FPGAs, Nvidia Infiniband and DDN Lustre.
• 2024-05-24 - PyOpenCL & Quantum simulation using Intel® FPGA.
• 2024-05-06 - Updated compute node OS, new MOFED release, python 3.11 added to login nodes, limits set on login nodes.
• 2024-04-24 - FPGA programming on Meluxina -- new documentation

System overview

This section provides an overview of the MeluXina infrastructure, including system architecture, components and networks.

Gaining access

Learn about possibilities for obtaining access to MeluXina, the access process, and managing your resource allocations.

First steps

If you are new to using an HPC system or to MeluXina, this section covers the essentials: connecting to the platform, data transfers and running applications. More in depth topics can be found in the dedicated HPC and our HPDA sections.

HPC

HPC power users will find here additional information about MeluXina and its environment enabling an efficient and effective utilization of the platform.

HPDA

High Performance Data Analytics sits at the cross-roads between Data Analytics and High Performance Computing. This section will help data scientists and data engineers to take advantage of MeluXina for data-driven workloads.

FPGA

Designed for compute acceleration, Meluxina's FPGA nodes have two 520N-MX PCIe board featuring Intel’s Stratix 10 MX2100 FPGA with integrated HBM2 memory. The size and speed of HBM2 (16GB at up to 512GB/s) enables acceleration of memory-bound applications. These cards can be programmed using the Intel® FPGA SDK for OpenCL and/or the Intel® oneAPI software development toolkit.

Platform events

Platform status and events are announced to the users through the MeluXina Weather Report system.
Planned events are communicated in advance through this system and also the Message of the Day (MOTD) on MeluXina Login nodes.

Questions and support

• For support requests on existing projects, please use our Service Desk or contact us at servicedesk [at] lxp.lu
• For commercial requests, you can write to us at sales [at] lxp.lu

The acquisition and operation of the EuroHPC supercomputer is funded jointly by the EuroHPC Joint Undertaking, through the European Union's Connecting Europe Facility and the Horizon 2020 research and innovation programme, as well as the Grand Duché du Luxembourg.